The present disclosure relates to integrated circuit devices. With advances in electronics technology, semiconductor devices have scaled down rapidly. Because semiconductor devices may benefit from not only a fast operation speed but also operation accuracy, research into optimization of a structure of a transistor included in a semiconductor device has been conducted. In particular, proposals have included using a scaling technology of increasing the density of integrated circuit devices by using a multi-gate transistor that has a fin-shaped active area on a substrate and a gate on the fin-shaped active area.